SETS Recruitment 2021 | as Project Associate | [2 Vacancies]: Apply by April 5

SETS Recruitment 2021: Society for Electronic Transactions and Security [SETS] is a non-profit society dedicated to research and development in the field of Cyber Security. The detailed SETS criteria and SETS application form to apply online process for AIESEC off campus drive further given below in the article.

So, Society for Electronic Transactions and Security · (Under O/o The Principal Scientific Adviser to the Govt. of India) · Prof. K. VijayRaghavan · Prof. K. VijayRaghavan.

SETS Recruitment 2021:

Project Description

Metro Area Quantum Access Network (MAQAN) ensures secure key exchange between point-multipoint using Quantum mechanisms. In this project, SETS focus would be on developing an efficient post-processing module required for field-deployable QKD systems. The post-processing module includes interfacing with quantum components, sifting, error parameter estimation, clock synchronization, authentication, privacy amplification, error correction, error verification, along Quantum-safe Post Quantum Crypto primitives.

Location

SOCIETY FOR ELECTRONIC TRANSACTIONS AND SECURITY [SETS] CIT Campus, MGR Knowledge City, Taramani, Chennai – 600 113, India.

Qualification requirements for the post Project Associate – III
Name of the Post Project Associate – III 
Number of Posts One 
Age Limit Not more than 35 years as on 
Essential Qualification i. PhD in Engineering/ Science (Physics/Electronics) or ii. First Class M. Tech /M. E (Microelectronics and Photonics/Laser and Electro optics/Applied Electronics/VLSI Design/Electronic & Instrumentation/ Communication System/ Computer Science/ Cyber-Security) 
Experience MTech/ ME with minimum two years’ experience (or) PhD in Science with minimum one year experience (or) PhD in Engineering 
Relevant Work Experience Candidates with experience in Quantum Key Distribution, Integration of Optoelectronic Hardware with FPGA, Post Quantum Cryptography, Quantum Network testbed creation and System Design & Development using FPGAs. 
Areas of Skill sets / Knowledge required a) Knowledge of Quantum Key Distribution protocols, high speed optical communication protocols (10Gig Ethernet, IBERT). b) Knowledge of Post Quantum Cryptography (Digital Signature and Key Exchange protocols) c) Knowledge of Quantum Network testbed creation and protocols testing d) Hands-on exposure of FPGA boards and Xilinx Vivado tools using Verilog/VHDL/HLS. Integration of optical and classical components 
RemunerationConsolidated salary would be in the range of Rs. 50,000 to 60,000 per month based on the experience and profile. 
Qualification requirements for the post Project Associate – II
Name of the Post Project Associate – II 
Number of Posts One 
Age Limit Not more than 35 years as on 
Essential Qualification i. PhD in Engineering/ Science (Physics/Electronics) (or) ii. First Class M. Tech /M. E (Microelectronics and Photonics/Laser and Electro optics/Applied Electronics/VLSI Design/ Communication System/ Computer Science/Cyber-Security) 
Experience MTech/ M.E with minimum one year experience (or) PhD in Science (or) PhD in Engineering. 
Work Experience / Desirable criteria Candidates with experience in Quantum Key Distribution, Integration of Optoelectronic Hardware with FPGA, Post Quantum Cryptography, Quantum Network testbed creation and System Design & Development using FPGAs. 
Areas of Skill sets/ Knowledge required a) Knowledge of Quantum Key Distribution, Post Quantum Cryptography (Digital Signature and Key Exchange protocols) b) Hands-on exposure on high-speed ADC-DAC, Time-to Digital convertors implementations on FPGA, optoelectronics. c) Hands-on exposure of Xilinx Vivado tools, FPGA designs using Verilog/VHDL and HLS. Languages Python, C and C++ 
Remuneration Consolidated salary would be Rs. 40,000 per month 
Nature of the Post

The positions (Project Associate – II and Project Associate – III) as proposed are purely temporary and would be filled on a contract basis with a consolidated salary under project mode. The duration of the assignment is initially for a period of One Year and would be extended further till end of the project based on the performance. There is no scope of continuation/regularization/absorption under any circumstances.

How to Apply?
  • Only applications received via email will be considered. The Subject line in the email should contain the “Application for the post of Project Associate – III / Project Associate – II”. The candidate is required to attach the following documents to the Email:
  • Resume (doc/pdf format) and
  • Personal Particulars form (pdf format) duly filled. The Personal Particulars form is hosted at SETS homepage. Link here.
  • The email should be sent to hr_qkd2_2021[at]setsindia[dot]net.
  • The last date for receiving applications by Email is 5th April 2021.
  • Shortlisted candidates would be required to attend a Written Test and/or Interview at SETS, Chennai. The date and time for this would be intimated to shortlisted candidates by Email.
Terms and Conditions
  • The shortlisted candidates would be required to bring all their original testimonials for verification on the test/interview day.
  • No TA/DA will be given to candidates appearing for written test or interview.
  • The prescribed qualifications are minimum and mere possession of the same does not entitle the candidate to be called for the written test or interview. The decision of the Executive Director of SETS in all matters relating to eligibility, acceptance or rejection of the applications, cancellation of advertisement and filling up or not filling up of post will be final and no inquiry or correspondence will be entertained in this matter.
Application Deadline

April 5, 2021

For further detail: Click here

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